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INSTRUCTION TRACE GENERATION

For many architectural investigations instruction traces are important. This research is intended to investigate and implement novel ways of generating or collecting accurate instruction traces from various systems with few distortions.

CURRENT TOPICS

  • Collect address traces from Pentium, PowerPC, and PA-RISC based systems for use in various studies. These traces contain all user and system activity and are available to interested parties.
  • Use the collected address traces in conjunction with other tools to generate instruction traces.
  • Develop trace compression techniques.
  • Distribute a collection of benchmark traces to interested parties in an attempt to permit researchers to perform reproducible work.

While we do not yet have instruction traces to distribute our process is described in a presentation that was given here at Brigham Young University describing the proposed technique. This hybrid trace collection technique promises to overcome many of the problems found in other trace collection systems.

SPONSORS

This work is currently supported by Tandem Computer.

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